James Adams and Eben Upton on designing Raspberry Pi 5

Raspberry Pi 5 is here, and it has been years in the making. I sat down with Eben to talk about the long process and the many decisions that led to Raspberry Pi 5 coming into being.

We do like a good in-depth chat, and this is a long one, so grab an appropriate beverage for whatever time zone you’re currently in, and give it a watch (or, if you’d prefer to read, click on the arrow below the video to expand a full transcript).

There’s plenty more where this came from on our Raspberry Pi 5 YouTube playlist
A transcript of James and Eben’s video

For people who prefer to read than to watch, here’s a transcript, edited to make following it a little easier. We used a machine transcription tool with a generous overlay of human; if you spot any stand-out oddities that we missed, please let us know in the comments!

Eben 0:10: Raspberry Pi has been, I guess, the biggest engineering programme we’ve done. Certainly if you include the RP1 engineering programme inside it, it’s the biggest engineering programme we’ve done at Raspberry Pi. It’s the longest. And when did we start?

James 0:23: Depends when you define start, but RP1 started in 2015.

Eben 0:27: Yeah. This is an eight-year programme. It’s a programme that kicked off before we shipped… we’d shipped Raspberry Pi 2, hadn’t we, at that point, but it was before we’d shipped Raspberry Pi Zero even. That’s definitely before three, right?

James 0:41: Yes. Three was in the works. But. Yes, so it was a long time ago.

Changes across the board

Eben 0:45: And so this has been a long programme. It’s been an expensive programme. I think I totted it up and it looked like a $25 million programme. And we’ve touched pretty much everything on the board, right?

James 0:58: We have. I guess we’ve got new power management silicon, a new Broadcom main processor silicon, we’ve got the same Wi-Fi as Pi 4. We have RP1, which is what we call Project Y internally. Why did we do it? We’ll get to that I guess. And I guess there’s some other interesting Pi 5 things like introducing reflow – again, we’ll probably talk about that in a minute. But there’s been a lot of stuff packed into this: although it looks quite a lot like a Raspberry Pi 4, I guess, there is an awful lot of new stuff —

Eben 1:32: Looks a lot like a Raspberry Pi 3, because you trolled everyone!

James 1:34: That’s true. I had to move the — had to, had to! — I had to move the Ethernet connector back from where we put it on Pi 4. So it had to move on Pi 4, because the Broadcom… the pinout meant that we had to bring the wires across the top. And again, the layout of the board meant this time, we had to move it back to the bottom again, because we needed space to get the Project Y southbridge chip and the Ethernet PHY underneath and that just naturally made it fall back into the standard Raspberry Pi layout…

Eben 2:07: … that we’ve had since B1, B+ in 2014.

“Everything has been co-designed”

James 2:09: So that worked — well, that worked quite well. I guess the thing to say about this board is it’s super, super tight, right? Everything… everything has been co-designed. So we worked with Dialog to design the power management chip; with Broadcom on the Broadcom main SoC. Obviously, we designed our own southbridge for the I/O. And each of those, we’ve co-designed the pinout so that all of the wires come out in the right direction.

Eben 2:40: When you look at the top of the board, what you see is enormous numbers of tracks going across, whether they’re coming from the Broadcom SoC down to the two HDMI connectors, whether they are the PCI Express bus coming across to RP1. There’s no wires crossing over each other, it’s just these parallel motorways…

James 3:05: That’s it, yeah. You’ve got a four-lane PCI Express that goes from the 2712 chip to the southbridge. And that’s a big bunch of wires, right? If any of those crossed over it would kind of explode the board tech.

Raspberry Pi 5 board technology: a six-layer board

Eben 3:18: What is the board technology?

James 3:19: So the board tech is exactly the same as we use for Pi 4, which is quite impressive, really, it’s a six-layer board, and we have what’s called HDI, which means you have some laser vias in there. So you have laser vias from the top layer to the second layer, one to two, and then also mirrored on the bottom. So then you have varied vias —

Eben 3:19: Okay, so you’ve got one to two — so you’ve got six layers of PCB, and the connections between layers on the PCB are one to two, five to six, and then two to five, in the middle of the board. And that’s a fairly mild — I think, probably when we started Raspberry Pi, that was quite a high-tech —

James 4:01: It was high tech when we moved to it; I think it’s quite standard now. Not too expensive. And we know it quite well, we know the materials that go into it, we know the cost structure of it. But actually, it turns out, if you look at the board, as you say, there’s big spaces where there’s lots of tracks; the biggest issue you have with these boards is if you have to drill any vias, either ones that go all the way through the board, or even the ones just in the middle, they put a big blocker in the way of any other tracks, right. So again, you get a double improvement, or it’s a double negative if you end up having to cross tracks over, because it just rapidly becomes impossible because you just have to drill holes all through the board and you just can’t read the tracks. So you know, it’s that co-design, that full-stack design, the fact that we can have control over all of these things, has made it possible to put this tech on that PCB.

Top-level architecture: control and co-design drive cost savings; integrate and eliminate

Eben 4:58: And that’s probably one of two big themes for this product in terms of the top-level architecture, right? The idea that if you — you know, we have a custom power management, we have custom core silicon, 16nm core silicon, we’ve designed our own I/O controller, RP1; if you have that level of control over all of the silicon in the platform, then it drives cost savings in the hardware. And I think that’s probably also mirrored — we’ll talk about software in another video, but I think it’s also mirrored in software, that if we understand all the components in the system in enough detail, and we’ve been able to fettle them ahead of time, to do work on them ahead of time, then you can take cost out of software, you can take performance inefficiencies out of software, and get more done with less processing. So that’s one big theme, co-design. I think if you just hold the board in your hands, that really springs out at you and it springs out in terms of these very neat parallel tracks on the board. I guess the other one is integration, right, this idea of eliminating shrapnel.

James 5:59: That’s it. Yep. So each of the big bits of silicon, we’ve tried to pull any of the extraneous bits and pieces back into those bits of silicon. So for example, in the power management chip, this also has a new feature that we’ve integrated, it’s a real time clock in there. It’s a much requested feature, it controls the power button, again a much requested feature. We’ve got —

Eben 6:28: Congratulations: so after twelve years of Raspberry Pi we finally have an RTC and a power button!

James 6:34: And it pulls in some of the other things like HDMI, 5V power switching, and things like this.

Eben 6:43: Places where you would have had 5, 10, 15% little pieces of silicon out on the board, now those have all been mostly slurped up into —

James 6:43: Pulled in to the main silicon. So all these features that we’ve had, and we’ve known about and we know we want, we try and pull them into the main silicon: it’s been a feature of all of the platforms. But I think this is the combination of all of that plus extra goodies as well.

Eben 7:03: Because it’s had the longest gestation, it’s had that long gestation. And that’s meant, you know, there are a lot of these things that if you only have two or three years of visibility, it’s very hard to hoover these things up into core.

James 7:17: That’s right, yeah. And I think having that vision from the beginning of the whole southbridge and we’d make that do all the I/O, you know, that’s kind of driven the layout of the board all the way through. So you know, we knew, when we were talking to Broadcom, how the thing was going to lay out or how we envisioned it. And actually it did turn out to — it all fell into place quite nicely. So you know, we’ve had — that thought was there, right from the beginning, which has been — yeah, it’s good to see it play out and actually work.

Eben 7:49: Yeah, it looks really cute.

James 7:50: It does look really cute!

Eben 7:51: So there’s a — but it still has more placements than any previous — it has more components on the board than any previous Raspberry Pi?

Power management on Raspberry Pi 5

James 7:55: Well, the Broadcom silicon is very fast. It’s a big chunky processor. If you look at the power management chip, there’s a whole ton of inductors around there — the top of the chip, there’s eleven inductors, and there’s a quad-phase,18 amp supply for the core.

Eben 8:15: I’ve been branding it at 20 amps supply.

James 8:17: Well, yeah, it’ll do 20 amps, right.

Eben 8:19: So what does that mean, quad-phase?

James 8:21: So that means that you’ve got effectively four switching controllers that are working in antiphase. So you can either have one massive great inductor, or you can have four smaller ones that switch faster. And the four smaller ones that switch faster have some advantages, like it can control the voltage at a finer time.

Eben 8:40: So the way the switcher works, you’ve got your 5V, and then you have your output switch —

James 8:49: Sort of, yeah, .7 to 1V.

Eben 8:51: And then you have an inductor out into the system. And then depending on the voltage that it observes coming out of the system, it has a clock period, and it connects the high voltage to that node for a fraction of that clock period. Now, with a single phase, you have a single clock period. And suppose maybe I use half that clock period. So what you’re saying is, quad-phase… So you can imagine dual-phase where you have a clock period which is like this, and another clock period which is like this, and then you have two of these switches feeding the same node. This way you actually have four which are 90 degrees, which are kind of a quarter out of phase.

James 9:29: Yeah. So I guess, sort of the way I think about it is, these things are running at, per phase, 2MHz, and they’re all interleaved. So the total rate that the thing can adapt to any kind of voltage change that it’s looking at is much faster.

Eben 9:44: So you’re going to get effectively an 8MHz —

James 9:47: That’s right.

Eben 9:47: — a new opportunity to make a different decision — Because of course you have this processor, which can be sat there in idle, and then a moment later can suddenly decide to run as hard as it can. That’s an enormous, it’s gonna pull enormous amounts of current out, be able to discover in one eight-millionth of a second rather than one two-millionth of a second —

James 10:05: That you need to do something. Yeah.

Eben 10:05: That’s got to be useful, right?

James 10:06: Yeah. And that also means that you need less capacitors on the output, right. So less buckets of charge that that need to compensate for the fact that yeah, this big beast of a processor can suddenly pull all the power, in nanoseconds.

Eben 10:23: I guess it’s an important part of the co-design point, right? That if you try and build systems like Raspberry Pi out of generic merchant silicon, you end up effectively having to put the next biggest thing… We require eight rails: so we have this little, seven relatively low-current rails, on the eighth very high-current core rail; maybe somebody won’t quite sell you that device. And so you end up having to supersize your power management chip, and take extra wasteful cost in that corner of the board. If you can get somebody, as obviously we have with Dialog Renesas, if somebody will design you exactly what you need, then there’s that much less fat, and you can get that much more done for your dollar.

James 11:08: That’s right. Yeah. And, yes, it is kind of exactly what we need, which is great, there’s no wasted silicon there doing nothing, which is nice, right? And we’ve managed to arrange it, we knew it was going to go in the corner of the board, so we spent a long time with Dialog, now Renesas, iterating the layout, so the package, thermal simulation, the layout, the die: everything’s all been designed to sit on the Raspberry Pi 5. And actually, again, that’s another one that’s just turned out to be really a nice —

Eben 11:36: It’s a beautiful piece of engineering.

James 11:38: A lovely bit of engineering, yeah.

Power Delivery

Eben 11:39: Now that also has our PD —

James 11:43: Yes. So it’s got a, inside —

Eben 11:45: So that’s a USB PD, USB power distribution? Delivery?

James 11:50: Power delivery. So this is your new modern USB PD — USB-C, which has this thing called USB PD, power delivery, which is a serial interface that allows your power supply to talk to your power sink. And the boards can request data from the supplier or they can request different voltages, right? So standard voltages are five volts, nine volts, I think 15 volts. So we have that ability now to talk to PD supplies, which is useful —

Eben 12:18: Because we have a PD supply!

James 12:19: Because we’re now launching a new supply with this product, which is a PD supply. Our PD supply’s a bit special, because rather than — so we need more power into the board, right. So we’ve got a much more chunky processor that can pull a lot more power when it’s really heavily loaded.

Eben 12:37: And we have an aspiration to be able to deliver more downstream power to USB devices.

James 12:40: Exactly, yeah. And other things plugged in: HATs, PCI Express, things like that. Fan! So we wanted more power to the board. Now the problem is — and we sort of left this open for a little while, which is kind of one of the reasons PD ended up in there anyway — is that you could do that by requesting the PD supply give you, say, nine volts at three amps, which is you know, 27 watts, that’s the standard. But then you’ve got to convert that on the board from nine volts down to five volts and all the other rails.

Eben 13:13: And that’s cost —

James 13:16: Yeah, costs you efficiency, so you end up throwing money at the problem, and throwing power into the board; you’re wasting energy. So actually, in the end, after we’d thought about it for a while, we decided to stick five volts — USB-C connectors can support five amps; some of these higher PD modes support 20 volts at five amps to get your 100 watts – so we decided to do five volts at five amps, which is quite hard and unusual. When I say hard, I mean, it’s a challenge to get the power supply to do that, because it’s a low voltage at a high current, which is a bit challenging, it’s a little bit more of a design challenge than the standard. But not impossible, and we’ve done it: we’ve got a nice five amp supply now. So that allows us to keep the board kind of as it is. So it takes the cost out, you’re not throwing any power away, which is important. And yeah, we’ve — the supply works fine, right? So this PD is now really used to just check the supply can do five volts at five amps.

Eben 14:23: So we interrogate the — and I know obviously there was a lot of internal discussion about this, right — about particularly how much power you can afford to allocate to downstream USB devices, while still reserving enough power to make sure that the Broadcom in particular — everything on the board, but particularly the big Arm cores inside the application processor could execute their worst-case workload. So what we’ve ended up with I think, is a world where we — so we probably have two worlds: we have a world where we are powered by a traditional three, three-ish amp power supply, and a world where this PD subsystem has detected that we’re being powered by the shiny new power supply. And then what do we do differently when we discover that?

James 15:14: So, if you have the full-fat supply, if you have the new supply, then you get full performance of everything and you get extra USB current over Pi 4.

Eben 15:26: So you get, what, sort of 1.5 amps?

James 15:28: I think we’re at a 1.5 minimum now, whereas Pi 4 was, I think, 1.1. So you get 1.5 and a bit, so about half an amp extra —

Eben 15:39: Which is another two-and-a-half watts.

James 15:41: Which is another two-and-a-half watts, and we know that actually Pi 4 level was quite good, it would run quite a lot of stuff without issue, without needing a powered hub downstream. So that just adds that extra buffer for for slightly more greedy disks, for example, spinning disks particularly. So that’s good. So that’s the new world. If you plug in a five volt, three amp supply, what we’ve decided to do is constrain the downstream USB current by default. So you will be able to run a mouse and keyboard, simple things, but it won’t let you, say, boot from an SSD, or a spinning disk by default. And you can override that.

Eben 16:26: So it’s about making it default safe, right. This thing comes out of the box, if you plug a mouse and a keyboard into it, you’ll be fine; if you want to plug more stuff into it, you’ll be fine, unless you, and I mean I think when we’re talking about worst-case workload on the Arms, we’re talking about pathological workloads, workloads which are really designed to stress the power supply to its limits. So I think what we’re expecting, right, is that for most use cases, you will be able to disable this feature.

James 16:51: And it will kind of be fine. But if you do plug lots of things in, again, we’re just trying to get away from having something that’s marginal and causes confusion. So hopefully it’s clear that, this way round, if you buy the new supply it’s all great. And you know, we’re not making those supplies particularly expensive, as with anything.

Eben 17:13: And if you don’t want to buy the new supply, it’s also still —

James 17:16: It’s also fine, and you just turn off the protection feature, which is a fairly easy thing to do, and everything’s fine. But just be aware that if you do load it up then you may suffer some instability, but in unlikely scenarios, I suppose.

Real-time clock

Eben 17:31: So that’s the bottom left of the board. We mentioned RTC: how does that work with respect to batteries?

James 17:36: So, we don’t ship the board with a battery; it’s got a little two-pin connector; we have a little cell on a flying lead —

Eben 17:45: With a sticky patch —

James 17:46: Yeah, much like laptops and places have, that you can buy and plug in and then the RTC will keep time over power outages. I mean, it’ll keep time anyway, as long as it’s plugged in. Even if the board’s powered off, as long as it’s got five volts coming in it’s gonna keep time, but if you want it to be completely separate — keep time over when it’s unplugged — then you need the battery.

“A power button! I can’t believe it.”

Eben 18:13: And then the power button, how does that work?

James 18:15: We have a power button! I can’t believe it. Well, it’s like a power button!

Eben 18:19: We even have a power button — we even have a little button on the case.

James 18:22: We do: the case, again, we’ve had a little bit more time than we normally would to iterate some of the stuff in it. The power button works really nicely with the case. The LED is right behind the button, so the different coloured light comes out very nicely, and the button [on the case] presses to press the power button [on the board].

Eben 18:41: So you’ve got a little bendy bit of the plastic which pushes on the switch on the board.

James 18:43: Yeah, which John [Cowan-Hughes] did a great job of iterating until we got a really nice solution to that. So how does it work? I guess much like a laptop power button, you know; when you first plug the Pi in, it will do what a Pi normally does, which is just power up, if you just power it from the wall. If you press the button, Linux should see that and it should be able to power down the system. Press it again, it will come back up again. Hold it for five seconds, it will hard-reset, much like a laptop.

Eben 19:17: And then press it again then to turn on.

James 19:18: And then press again to turn on. And that’s about it! I think the only other special feature we’ve put into that is if you’ve got a host machine, you plug that USB-C into the Pi with the power button held down, the Pi will boot into USB boot mode; what that means is the host machine can upload firmware into the Pi. So this is if you somehow brick your flash on the board.

Eben 19:48: This is RPIBOOT mode.

James 19:48: This is RPIBOOT mode. Like Compute Modules have, this is a way to enable that, still using the same button.

Eben 19:55: We get a lot of value out of that button!

James 19:58: Yeah, we’ve made it do as much as we can, ’cause it’s kind of hard to squeeze a button on the outside. There’s no space for two buttons!

Eben 20:02: I think I saw someone suggesting using it as an input for the — I think I saw Tim suggesting also using it as an input device for the debug screen, the HDMI debug screen that comes up at the start as well… 1-bit input button…

James 20:04: Well we can do that! Maybe that’ll turn up in the firmware — I don’t know, we’ll see!

Eben 20:20: So that’s the bottom left of the board. That itself was a small fraction of the board area, but it’s worth emphasising it was an enormous, it was a piece of engineering work at Dialog Renesas, but also for you and the other people in the organisation specifying and iterating with them what exactly that should look like. And that’s been going on since 2020, ish?

James 20:41: 2020, yes.

2712, a speed boost, and benchmarking

Eben 20:43: Yeah, probably. It’s pre-pandemic, right, the kickoff for that. Yeah, just about. So that’s that corner of the board. The middle of the board, obviously, we have 2712. Now, that’s another generation of the 270x design that’s powered all of the Pis. We’ve got those Cortex A76s in there, which are pretty beefy. They’re reasonably – they’re something like, the back-of-an-envelope number that I have is that they’re something like 50–60% faster clock for clock, and we are going to launch at 2.4GHz versus 1.8GHz. So you can imagine you’ve got about a 33% uplift from clock speed, you’ve got north of 50% uplift from architectural IPC. So chunky cores.

James 21:37: Chunky cores — I mean, well, you’ve used it: it’s very fast. I guess sort of two-and-a-half-ish times, on some of the JavaScript.

Eben 21:47: I care a lot about the JavaScript benchmarks; I think a lot of people care about JavaScript benchmarks, because, (a), they are directly relevant to end users, and (b), they are hard to forge. Some of the simpler benchmarks – Dhrystone, even things like CoreMark these days, you know, SPECint — you can build cores which target those benchmarks, you can try and crack the benchmark. It’s very hard to crack a JavaScript benchmark without accidentally also making a good core. And so where are we? We’re kind of, in my mind, I always think about JetStream 1.1, that’s my favourite JavaScript benchmark. And you’ve got kind of a continuum where you have maybe a Pi 3, 3+ posting 10 to 15 on that, a Pi 4 with the 1.8GHz clock posting about 50. And then, I think if I sat down in front of Liz’s M2 MacBook, there’s a $7,000 MacBook, that’s scoring about 400. So you’ve got about a factor of eight between a Pi 4 and the shiniest thing, really, the shiniest client platform that exists. We’re coming in somewhere in the 130 to 150 range here, which is kind of cool, right? You know, it’s two-and-a-half times what we were shipping before; it’s a third of the shiniest thing that you can get. Certainly I have a 2015 MacBook Air, which posts about that kind of performance, so it really is quite a respectable client platform.

James 23:23: I mean, just using it on the desk with our beta builds, it’s very usable. I sort of forget what platform I’m using, PC versus Pi, now. Whereas with Pi 4 you could, you know, you could sort of just about tell.

Eben 23:40: We did a lot of work in the pandemic with Pi 4, we got lots of Pi 4s out to kids. We had a huge number of kids here in the UK who were sent home without adequate computing facilities; we got a lot of Pi 4s and then latterly Pi 400s out to those kids, and they were very usable.

James 23:54: Pi 4 was really good and usable. But you can sort of tell that —

Eben 23:57: Yeah. It’s the kind of difference between good and no compromise.

James 24:02: Yeah, you don’t even — you just don’t notice — you’re not thinking it’s a Raspberry Pi.

Eben 24:07: And I think Bookworm has fed into this as well. Raspberry Pi OS Bookworm is the launch operating system for this platform; that came with its own round of performance improvements that have affected all of the previous platforms as well. So you’re kind of bringing together two sets of performance improvements at one moment in time.

James 24:27: Yeah. It’s going to be — well, it is — great.

VideoCore VII, increased display pipeline bandwidth, increased memory bandwidth

Eben 24:30: So we’ve got A76s at 2.4GHz, we’ve got VideoCore VII, so we have the great-great-great grandchild of our little baby —

James 24:39: That’s been a long time since we built that!

Eben 24:41: We built VideoCore IV in 2007 to 2009, yeah. So this is the distant successor of what we bought and what we built and what we, of course, what we shipped in Pi 1.

James 24:53: Which is very cool, actually. We’re getting old, you know!

Eben 24:56: Yeah! We’re still gonna keep using it!

James 24:58: It’s kind of fun.

Eben 25:00: So we’ve got VideoCore VII: it’s got more processing elements, it runs a lot faster, so it’s running up — I forget what the number is — I think it’s about 900MHz.

James 25:09: Yeah, I think that’s where we ended up.

Eben 25:11: Yeah. So it’s a pretty speedy platform, it’s got twelve QPUs in it, I think. So you’ve got a bigger, faster GPU; obviously that’s supporting more display output capability as well, right?

James 25:26: Yeah. So we — well, Broadcom have increased the display pipeline bandwidth, effectively, so we can do two 4Kp60 now, fairly comfortably.

Eben 25:39: Remarkably comfortably, remarkably comfortably. I plug my laptop into a 4K television and you can feel it struggle, where this really doesn’t seem to break a sweat when you do that, it just works.

James 25:49: And I guess coupled to that is, now, LPDDR4X, which doesn’t change the game very much, but it’s a slightly more energy-efficient LPDDR4 RAM now.

Eben 26:00: We’ve got about twice the achievable memory bandwidth. So we were shipping LP4 3200, and now we’re shipping LP4X 4267. But there are architectural aspects —

James 26:00: Inside the architecture, that’s where the difference is really, more than the — I mean, the externals got faster. But.

Eben 26:15: So you’ve got architectural aspects of the 2711 design, the Pi 4 design, that really cut your 3200 down to about 2000; it’s very hard to get faster than about 2000 speed grade. So you’ve kind of got a doubling there. You’ve got a lot of doubling in the platform actually: you’ve kind of got a doubling of CPU, a doubling and a bit of CPU performance; you’ve got a doubling of display app bandwidth; we’ll come on to RP1 in a little bit, and you’ve got some doublings downstream of that as well; and underpinning all of that, it’s no use doubling all the stuff around the outside if you don’t also double your path to memory — double your internal performance and double your path to memory.

Cooler than Pi 4 for similar load; more dynamic range

James 26:53: But we haven’t doubled the power.

Eben 26:54: We haven’t doubled the power. In fact, I think for typical use cases… I think we have a few — as you can tell by the fact we’ve had to make some hard decisions about USB — we have a few edge cases which have higher power consumption, [but] my experience of it is it’s a cooler platform.

James 27:12: Out of the box, it’s very similar to the current Pi 4 in terms of thermal —

Eben 27:20: The idle performance is about the same. The sort of typical performance, my experience is when you put it under typical load, not under pathological load, when you put under typical load, it’s cooler than a than a similarly loaded Pi 4.

James 27:35: That’s right, you’ve got quite a lot more performance for — in fact we should probably try and quantify that. But it is a very cool platform for the performance you get. You know, because it’s a more performant processor, you just have more dynamic range in the system, which makes the engineering more of a challenge, right; we’ve got this very beefy core supply, and we’ve done a lot of testing that shows that there’s quite a lot of margin in there even in the worst case — but that’s good, right? You don’t want — you’ve got to —

Eben 28:04: People are going to enjoy the overclockability.

James 28:05: That’s it — there’s overclockability. But also, you know, we had to make this decision quite a long way before we had the actual silicon that it was going to be coupled to. And, yeah, turned out we made some good engineering decisions as well. So, you know.

Eben 28:18: We didn’t nickel-and-dime it; we got it just right.

James 28:21: Again, it’s another thing that’s worked quite nicely.

“We’re on the hunt for some MIPI devices that need four lanes”

Eben 28:25: And I guess the other interesting thing in that platform: PCI Express. For the first time we have — well, shall we talk about what — you know, we talked about the board being largely a [familiar] Raspberry Pi; shall we talk a little bit about the two or three things that have changed in this board layout? What’s changed with the FPC connectors on top of the board?

James 28:44: All right, so, what have we got? So all previous Pis had a display and a camera connector, so this uses the MIPI D-PHY, and they were two lanes, right, so two-lane camera, two-lane display.

Eben 29:00: And they were nominated — THIS was the camera…

James 29:01: THIS is the camera, THIS is the display, and the controllers behind them — unidirectional controllers. So on our RP1, what we’ve done is, we’ve still got these D-PHY, but they’re now four lanes, and behind each one is a dual controller, so it can either do camera or it can do display. So rather than the old arrangement — one camera, one display, each two-lane — you’ve now got two multifunction ports, two multifunction FFC connectors, which are now .5mm pitch, so they’re physically smaller but have more pins.

Eben 29:36: And they’re the same pinout that we use on the Compute Module boards, the I/O boards, right, so it’s actually quite a mature — since 2014, it’s quite a mature standard.

James 29:44: So a 22-way MIPI port, I guess. We’re calling it mini: mini camera, mini display. And so you get four lanes and you get — each one can —

Eben 29:45: We’re on the hunt for some MIPI devices that need four lanes —

James 30:01: Yes, absolutely. No doubt we’ll have some coming in the future; watch this space. But each of those can be either a camera or display.

Eben 30:10: So you can have two cameras, or two displays, or one of each, in either order. And those are physically located where the —

James 30:21: Where the AV jack used to be. So —

No more AV jack, but solderable pads

Eben 30:24: Oh yeah, tell me about the AV jack — it’s super sad!

James 30:27: AV jack’s gone, sorry; our lovely —

Eben 30:30: Got some pads I can solder to.

James 30:31: Yeah; so there are two holes that you can still get TV out, composite video. In fact, there’s a new composite video system in RP1, which we designed, which can even do some very — I’m told — some very archaic television —

Eben 30:51: Are we gonna go down the Television Museum, or are we gonna just challenge the first… it’s 425-line, is it, the old — is it 425? Whatever the old standard… Not quite the John Logie Baird standard, but the original Philo Farnsworth stuff…

James 31:03: Yeah, it’s really going beyond my understanding, but I understand that there is a very old standard —

Eben 31:11: The pre-PAL, pre-NTSC, pre, uh, yeah.

James 31:15: So the engineer who did it had a lot of fun making that.

Eben 31:17: So we’re looking forward to seeing the Raspberry Pi desktop on those 1950s televisions with the mirror, where the CRT is vertical and there’s a mirror on the top of it, you know, that’s gonna be an achievement.

James 31:27: So you have to work a little bit, because you’ll have to solder a two-pin header to get that out. And I guess AV-wise, well, something had to give to squeeze everything onto the board, and I think that was probably the least used; and quite a high cost for the function, right, as well. There’s quite a bit of shrapnel in that, and you need the connector. So I think it was a reasonable trade.

PCI Express

Eben 31:53: So that’s down there in the same place as the AV connector, roughly the same area as the old camera connector. What’s happened over on the left-hand side of the board, then?

James 32:01: The left-hand side: so we talked about the bottom left; middle left, we’ve got a new flexible FFC connector, that does single-lane PCI Express. We did look at trying to see if we could squeeze an M.2 connector or something on the board, but for power and physical space reasons that wasn’t really going to happen. So what we’ve done is we’ve got a, what is it, 16-pin FFC which carries your single-lane PCI Express and control signals.

Eben 32:31: Which I think we’re rating to Gen 2. I think it may do Gen 3 but… It’s got a Gen 3 controller behind it though.

James 32:39: I think the Broadcom silicon has a Gen 3 controller, but will it be compliant to Gen 3? Maybe, maybe not — I think it’s been designed for best effort, but, yeah.

Eben 32:51: Perhaps it’s worth having the brief history of Pi I/O, of Raspberry Pi I/O controllers, right? All Raspberry Pis have looked like core silicon plus I/O controller. With some bus between them. And so we had three-and-a-half, four-and-a-half generations of product through to 3B+ where that chip was one of several chips that we bought from Microchip, and that bus was USB 2. And the thing that came out downstream of that was more USB 2, via a hub, and 10/100 and then latterly 10/100 gigabit, sort of reduced gigabit, Ethernet. We then had Pi 4, which pulls Ethernet onto the Ethernet MAC —

James 33:33: Into the main 2711, yeah.

Eben 33:36: So you have an external G PHY. And then the I/O chip is the VLI805 —

James 33:42: It is PCI Express to USB 3.

What does RP1 do for us?

Eben 33:44: And so this is a very standard thing for us. You can’t always fit the all the functionality you want into the core silicon. But this, we take it to the next level, I guess, in a couple of ways: one, because it’s something we’ve designed ourselves; and two, because we put a lot of functionality. So what’s in RP1? What does RP1 do for us?

James 34:06: Oh, lots of things. I guess USB 3, because that’s sort of the most visible I suppose. So you’ve got two USB 3; it’s got quad-lane, Gen 2, PCI Express —

Eben 34:18: So that’s 16 gigabits of bandwidth.

James 34:19: 16 gigabits of bandwidth.

Eben 34:21: 2 gigabytes per second as well.

James 34:22: You’ve got two 5 gigabit USB 3 controllers. So each of your blue ports it has is on a separate controller, which, if you’ve got two disks plugged in, that does make a difference. You’ve got the MIPI camera and display interfaces that we talked about before.

Eben 34:42: And that’s about four gigabits each. They are one gigabit per lane, four lanes, so about four gigabits each.

James 34:48: It’s about a gigabit per lane, yes, that’s right. Okay, we haven’t got anything that uses that just yet… and then we’re going around the board. Yeah, it’s got an Ethernet MAC on there. We use the same PHY from Pi 4, but it’s plugged… it’s plugged into the RP1 chip this time. And it does the I/O… GPIO.

Eben 35:12: So this is a significant architectural change, right? It’s a significant architectural change in that what’s happened is a lot of that analogue used to be integrated into the core silicon, and the nice thing about this is it’s let us go down to — so the core silicon is now 16 nanometres. And you can build that 16-nanometre silicon, and focus, really, largely on the digital elements of the design. So that’s got HDMI; so why isn’t HDMI on RP1?

James 35:38: It’s just a bandwidth thing, right? HDMI has very large amounts of bandwidth; 4Kp60, I don’t know, do you know off the top of your head what the bandwidth is for that, but it’s a lot!

Eben 35:45: Six gigabits per lane, 24 gig or something? 24 gigabits for each port, times two, 48, six gigabytes per second, right. So three times as much bandwidth as the total bandwidth that we can ship across to.

James 36:01: So that naturally — and you’ve got the high-bandwidth display pipeline stuff behind it as well. So that doesn’t make any sense to ship off across another even quite high-bandwidth interface. SD card still sticks to the main processor for booting, and again, it just sort of naturally, because it sits on the left of the board, it makes sense to put it there. And DDR memory, again, high-bandwidth, needs to be close to the port system.

Eben 36:29: And then the PCI Express, the user PCI Express port, and then this four-lane —

James 36:33: And then, yeah, user PCI Express port straight off the main SoC, and the four-lane comes out on the right-hand side as you look at the top of the board, feeds RP1.

“When you look at the ball map for that chip, you can see the shape of Raspberry Pi”

Eben 36:41: Outrageous amount of co-design there. You just kind of go round the ball map; you can see the shape of a Raspberry Pi, when you look at the ball map for that chip, you can see the shape of Raspberry Pi in the ball map.

James 36:50: The Pi absolutely drove the ball map, and then we had to figure out how to make the ball map!

Eben 36:54: The ball map drove the floorplan — well, drove the chip floorplan; you go and look at the die, and the layout of the individual analogue elements on the die, and some of the digital elements on the die, is driven by the needs of the top level. That’s this co-design; that’s what you need eight years to do this, right? There is that level of co-design in the system.

GPIO: what changes, and what stays the same?

So this is a pretty comprehensive overhaul, putting all the analogue out there; it’s a pretty comprehensive overhaul putting the GPIO connector out there as well. So what changes and what stays the same? Because of course the GPIO connector is really important to a lot of people who use Raspberry Pi.

James 37:34: The pinout’s not changed. And the nominal peripheral functions behind the pins haven’t changed. But we do have controllers from different places now because it’s not Broadcom’s silicon. You know, we’ve got slightly different —

Eben 37:52: Can you remind me? We’ve got PL011 UARTs, so they’re the same UARTs.

James 37:57: That’s right.

Eben 37:58: They’re via Raspberry Pi, from Arm via Raspberry Pi, rather than —

James 38:01: And I think we’ve got Synopsys I2C and… SPI? Or…

Eben 38:06: And I2S? SPI is the one I can’t remember as to whether that’s Synopsys or… I think it’s Synopsys. I don’t think it’s PL022. Because we use PL022 — we use the Arm SPI on RP2040, but I think we made the other decision. It’s an interesting point about RP1, right? We’ll talk about that in a[nother] video a little bit, but you know, RP1, the clue is in the name, right? Its longest-lived, although it’s the latest chip product to come out from us, it’s actually the one that started first. And so some of these decisions were made long before RP2040 was a thing.

James 38:42: And it’s a complicated chip, right? It’s got lots of different analogue, lots of different clocks. It’s RP1 C0 because this is effectively the third spin of it, right? We had a couple of runs at it. And yeah, I mean, it’s actually turned out really well in the end. But again, takes a long time.

Eben 39:03: So you have GPIOs on the same pins on the connector, you have the same alternate function block behind the same pins, the MCS out is the same, but the controls themselves are different; but we don’t expect that to be an issue because the majority of people are interacting with this via libraries, they’re interacting via an abstraction.

James 39:27: No doubt there will probably be some little corner cases and bits and pieces, but we’re really hoping that it’s 99.9% not an issue.

Eben 39:34: There’s a little bit of fun around I2S, right, that the I2S blocks we’ve got are unidirectional — so the old I2S block in 270x is a transceiver, is a bidirectional block, where what we have is, now we have two unidirectional blocks, a TX and an RX, MCSed onto the same pins. So there’s a few little quirks.

James 39:54: A few little quirks, but the idea is that this will live for quite some time, for a long time. We won’t have to change it again.

Avoiding compatibility breaks

Eben 40:02: I think a lot of the success for Raspberry Pi has been about not introducing pointless compatibility breaks — the continuity of silicon supply; you know, lots of the architectural decisions staying the same from generation to generation. This is a compatibility break. But it’s a minor compatibility break. And it’s one compatibility break every twelve years. So expect another one in 2035–2036 maybe. The expectation is that this, RP1, can live for several generations of Raspberry Pi.

James 40:32: I mean, even if we spin it, to change it a bit, which I suppose we may do, the logical structure will stay the same. We won’t, again, pointlessly break anything, we’ll really try and keep it the same.

A chiplet architecture, from before chiplets were cool

Eben 40:46: But this was your concept from 2015, 2016. It’s effectively a chiplet architecture, right? It’s before the word, before chiplets were cool. We were building a chiplet, we just didn’t know it was a chiplet then, right?

James 40:56: Pretty much, yeah. Now someone’s come up with a name for it…

Eben 40:59: But this idea of putting the right stuff on the right process node; it’s a 40nm chip; 40 nanometres remains a great process for doing analogue on, right?

James 41:08: It’s a good process; it has been a bit constrained, but less so now. And it’s relatively inexpensive. Well understood, and we’re very familiar with it, right, so it’s worked to our favour, for sure. And if it’s the first chip you do, you want to do something that you’re familiar with. But even despite that, I think it’s the right kind of process to put all this stuff on. Yes.

A manufacturing change for reliability

Eben 41:31: Should we talk about manufacturing briefly? Because there’s some big manufacturing — certainly one big manufacturing change; what’s that?

James 41:39: That’s right. This has been another thread in the “how do we make Pi 5 better? How do we make it cheaper?”

Eben 41:49: How do we make it more reliable.

James 41:50: “How do we make it more reliable?” So what we have worked internally and with Sony, our CEM partner, to do is to… OK: when you make Pi 4, or Pi 3, or all the legacy stuff, you have three big processes. You have one side of the board where they pick and place components onto. So what they do is they take the bare board, they silkscreen some solder paste, which is basically little teeny tiny solder balls in flux, onto the pads, and then they use machines to put the components on, and then they bake that in an oven, which melts the solder and all the components stick on it.

Eben 42:26: That’s the bottom side first.

James 42:27: Bottom side first, that’s SMT, surface-mount [technology]… And then they flip it over and they do the other side, in exactly the same way. And then the third process, the third big soldery process, is what they call wave soldering. So none of the through-hole components have been put on at this point —

Eben 42:47: Or selective soldering.

James 42:49: Or selective soldering, yeah. And basically, we have robots that then put the through-hole components —

Eben 42:54: And we’ve all seen the pictures of the cobots, they are human-like robots.

James 43:00: So they are putting the through-hole connectors, so USB connectors, GPIO connectors — yes, largely those. And then it goes into a big machine, heats the board up, and it squirts solder onto those pins, which then goes into the holes, and then the board comes out, and that’s it. It’s done, and then it’s tested.

Eben 43:21: And someone looks at it very carefully.

James 43:22: That’s right. So that step, it’s a third step, it thermally cycles the board again, but also it’s kind of splashing solder up on the bottom, which does increase the defect rate, right? Often we get shorts between the pins, which then need to be hand-reworked.

Eben 43:41: It generates solder balls as well.

James 43:43: It does generate these little teeny tiny solder balls, which occasionally, you will see on the bottom of a Pi; now, Sony have — and this is a standard thing — they have a standard for it. If it’s a certain size, then basically it’s stuck to the board with solder and it’s not going to move.

Eben 43:59: And all products, all products do this. And the interesting thing about our product, of course, is that our product is often not in a case.

James 44:05: Not in a case, so you see it. And actually even the surface mount can generate solder balls – if you get like a little bubble or a sputter, it will spit out a tiny bit of solder. So you can never completely eliminate it. But what we’re doing is we’re using the pick-and-place machines now in a two-process… So you do the bottom side first as before. And for the top side, you put all your surface-mount components on, and then the machines have been adapted to then put the through-hole components on. So we’ve both worked to get the right handling for the big components on the same pick-and-place machines we use for the small components. And also we’ve worked with the connector manufacturers to adapt the connectors so that they work in a way that you put paste onto the holes at the top, put the component on it, and then when it goes through the oven that paste melts and sucks down the holes.

Eben 45:02: So this is intrusive reflow.

James 45:03: We call it intrusive — well, I mean, it’s called intrusive reflow. It’s not really a new thing. But it’s not a thing that I think is done very commonly with the kind of board that we have. And if you turn over a Pi 5 and look at it, it is really, really nice and clean on the bottom, and you don’t have the pins protruding through, they’re kind of flat on the board.

Eben 45:23: This caused you a bit of trouble, right? You used to use these pins, some of them, right?

James 45:28: It’s been quite a long process to get this to work. Don’t underestimate how challenging it was to convince ourselves that it was all going to work. So we’ve done a lot of trials.

Eben 45:39: And we built a bunch of Pi 4s with this technology.

James 45:41: We built 5000 Pi 4s with this technology. And that taught us that actually, it has its other issues, in that, when we test the boards, you use sharp pins to probe into the test points and onto some of the pins underneath the board. But with intrusive reflow, those pins have changed shape. And that has caused a little bit of test, um…

Eben 46:03: Excitement.

James 46:03: Excitement.

Eben 46:05: Excitement is the technical term.

James 46:05: I think basically, you still get flux on the pins, but it’s well controlled, it’s over the top of the pin where the solder’s been. But that flux is a little, it’s slightly different to what you get from the wave solder, so actually, it can gum up the pins of the tester a bit more.

“A low-cost solution to reducing people’s distress when they smash it on the deck”

Eben 46:26: So it’s been some fun there; the other one is the protruding pins also had a mechanical benefit, when you’re in the field, right? That they’re protecting the — if you imagine, you’ve got all around two edges, two and a bit edges of the board, you’ve got pins sticking —

James 46:43: Yeah, you’ve got like a millimetre and a bit of pin —

Eben 46:45: And then you’ve got an SD card socket over on the other side. So you’ve actually got, if you have a component like a crystal or something on the bottom — do we have crystals on the bottom of the board any more? What’s left on the bottom of the board? It’s mostly caps.

James 46:55: It’s mostly little capacitors and resistors.

Eben 46:56: But if you’ve got components on the bottom of the board, they’re kind of somehow protected; they’re kind of in this convex, they have a kind of a convex shape around them protecting them. When you take away those pins, all of a sudden the caps on the board are resting on the table when you put it down, right.

James 47:10: Yeah, we realised once we had the first prototype, it’s like, oh dear. You put your Pi 4 on the table and the thing that’s taking all the, you know —

Eben 47:18: Suppose you push connectors into it, it’s a bunch of ceramic caps —

James 47:21: Pushing all your little ceramic caps — mashing them into the table. So we’ve put a couple of little metal — they’re actually designed to be ground test points, but they’re little metal hoops — in the place where the pins used to be on the USB connectors and Ethernet connector. And, again, along with the SD card socket, that kind of holds the board off the deck.

Eben 47:43: So even if it’s uncased, you still, you know —

James 47:46: We encourage people to be very gentle with the boards and put them in cases, right? They’re not really designed to be thrown around. But it just helps, right? For a low-cost solution to hopefully reducing people’s distress when they smash the thing onto the deck.

Eben 48:02: Yeah, don’t smash the thing on the deck, don’t put it on a… put it in a case, get a Raspberry Pi case. So that’s the platform, right? I mean, there’s a lot of, you know — that’s how you spend $25 million.

The most “Raspberry Pi” Raspberry Pi ever

James 48:15: And how many years?

Eben 48:17: $25 million dollars, like an eighth, a sixth of my life, something like that… The nice thing about it, right? It’s a Raspberry Pi. But it’s the first one where we have really been able to intercept every element of the design, knowing that that element is going to go into Raspberry Pi. There’s no real 270x legacy in there, there’s no — pretty much everything in there has changed, even things like the ISP, and we’ll do a separate video on the camera pipeline. But the ISP: that’s entirely developed at Raspberry Pi, pushed into the Broadcom design.

James 48:54: It’s kind of the most “Raspberry Pi” Raspberry Pi ever, because we’ve had our hands on everything!

Eben 48:59: It is very Raspberry Pi. And it probably is, we talked about a compatibility break — it probably is… this is the most significant architectural overhaul of the platform in its history. It’s moved from a monolithic device, to a pair of devices that work together and are decoupled by PCI Express, to a chiplet — let’s just use the modern word and call it a chiplet design. So yeah, it has been enormously good fun to work on, right?

James 49:24: It’s really nice to be launching. I think a lot of us are gonna go lie down for a bit…

“I’m amazed nobody asked us what RP1 was!”

Eben 49:31: Yeah, yeah!… It’s also great that it gives another chance to talk about what the chip team have been working on. You know, we have a lot of people working at Raspberry Pi on silicon. And yeah, we probably have more people working on silicon than could be justified, and for a longer period than can be justified… RP2040 is an amazing object, but, you know, it probably represents maybe a quarter of the work that the chip team have done since 2015. And the vast majority of the rest of that is in this device, is in RP1. And I’m amazed that nobody asked — I’m gonna say it now — I’m amazed nobody asked us what RP1 was! ‘Cause when we did RP2, you know, RP2040 has RP2 written on the top of it; RP3A0, the design that we use on Zero 2, has RP3 written on top of it, and I did sit there, particularly once we did RP3, I did sit there sort of waiting for the inevitable, “What’s RP1 then?”

James 50:20: I think RP3, because it has a Pi 3 gen…

Eben 50:23: Yeah, each of them has a plausible…

James 50:24: It’s kind of confused things, which is fine… Surprise, RP1 exists!

Eben 50:30: That’s it… RP2 does not stand for RP2040; RP2 is the second showing —

James 50:35: It’s really nice to be launching this platform with the first one: finally we’ve got it in the wild, and, yeah. It’s good.

Eben 50:43: Good fun. Excellent. Well, thank you for that!

James 50:46: Well, thank you!

Jump to the comment form

xeny avatar

Thanks both for taking the time to do this and whoever checked the transcription. It’s a fascinating read on the birth of a new machine.

The link from the transcript back to the accompanying blog post points to https://www.raspberrypi.com/?p=101899 when it seems as if it should point to https://www.raspberrypi.com/news/james-adams-and-eben-upton-on-designing-raspberry-pi-5/ ?

Reply to xeny

Helen Lynn avatar

You are quite right. Thank you! Now fixed.

Reply to Helen Lynn

andrum99 avatar

“The most Raspberry Pi Raspberry Pi ever” ❤️

Reply to andrum99

thelowsaltpopcorn@hotmail.com avatar

“So you will be able to run a mouse and keyboard, simple things, but it won’t let you, say, boot from an SSD, or a spinning disk by default.”
Does James include in the term SSD an M.2 SSD embedded in a USB 3 enclosure? These tend (especially the SATA ones) to be lower-powered than 2.5-in SSDs. Also would using the PCI-E connector (for say an M.2 SSD) require the 5-amps PSU?

Reply to [email protected]

James Adams avatar

Without a 5V/5A PD supply the Pi5 will, by default (and you can override this), limit downstream USB current to 600mA. That’s generally not enough to power SSDs. In general using a high quality 5V/3A supply like our original 15W PSU works fine if you override the 600mA limit as long as you don’t have very high demand elsewhere (high-demand downstream USB devices/PCIe/camera/HAT and high CPU load).

Reply to James Adams

Thomas Kaiser avatar

And what about voltage at the USB ports? Is there a step-up converter in the power path to the USB receptacles and if not what kind of voltage drop is to be expected at say 5V/4A drawn from the PSU?

Reply to Thomas Kaiser

Thomas Kaiser avatar

Ok, found https://github.com/raspberrypi/documentation/blob/pi5/documentation/asciidoc/computers/raspberry-pi-5/power-supply.adoc in the meantime.

“You can’t see USB current or anything else connected directly to 5V because this bypasses the PMIC” – already curious about the voltage drop at the USB ports in real world situations when sucking more than 3A from the 5V PSU…

Reply to Thomas Kaiser

Yolanta avatar

My biggest gripe about the Pi architecture are the GPIO pins. I wish they would be condensed into a connector and the full size pins offered as an accessory, a HAT probably. That would free up a lot of space for more useful things, like Audio in/out, full size HDMI, etc. The RPi team should conduct a poll “How many Pi users make use of GPIO?” I would be everything I own, my chastity and reputation, that the answer will be “fewer than 50%”!

Reply to Yolanta

Paul Miilligan avatar

If you go to the Explaining computers website, Chris Barnatt has reviewed numerous Raspberry Pi competitors. The near universal agreement is that the GPIO pins it what makes a Pi a Pi.

Reply to Paul Miilligan

Laurent avatar

Nice video. Thanks for the transcript too, I appreciated a lot since I sometimes struggling understanding Jas… Eben when he talks ^^’ (not a native english speaker here).

Can’t wait to listen more about this RP1, I can’t believe it was started so much time ago.

Have you ever estimated how long did the pandemic/shipageddon delayed the design of the RP1 and the Pi 5 ?

Reply to Laurent

James Adams avatar

I think in the end the pandemic only delayed us by about 6 months.

Reply to James Adams

Ralph Hockey avatar

Caused less delay to RPi5 than it did to HS2 then :-)

Reply to Ralph Hockey

Mike avatar

That was an informative video, and the transcript was especially helpful. I look forward to the improved performance and features, particularly the real time clock. But I’ll miss the audio/visual jack, which I used for headphones. (I definately understand why you dropped it).

I wonder if you folks would consider making/selling a USB dongle that replicates the function of the A/V jack. Or maybe you could test and endorse one from an existing vendor. This would help overcome any customer reservations about the ‘missing’ functionality.

Thanks for all your work on this project, and for considering this suggestion.

Reply to Mike

AndrewS avatar

There are LOTS of cheap USB sound cards available, see e.g. https://www.google.com/search?q=usb+sound+card+raspberry+pi

Or for something higher-quality, see https://www.raspberrypi.com/products/#add-on-boards

Reply to AndrewS

Anthony R. King avatar

I have been considering this topic of late. The on-board audio support aspirations really contrast with those for the video with Raspberry Pi. I would often run a 3.5mm stereo jack to phono connectors on a hi-fi amp in the past, for great computer audio listening. I didn’t bother with the Pi as that socket really is not hi-fi, by all reports.

At least we can expect good quality from HDMI audio. It’s possible to break the audio out, but the solutions for that aren’t terrifically appealing in terms of neatness and value.

As far as USB adapters are concerned, I don’t see people having much difficulty using them with the Pi; compatibility for such generic devices (including across platforms) seems pretty good. In the UK, at least the suppliers will endorse specific adapters for use with the Pi, such as this inexpensive option:


Reply to Anthony R. King

andrum99 avatar

If you want hi-fi audio out of a Pi, Raspberry Pi also do a range of rather good HATs: I have an old version of the DAC+ (see https://www.raspberrypi.com/products/dac-plus/) for example.

Reply to andrum99

Anthony R. King avatar

That’s £34.20, including the extra-high replacement case (currently unavailable). 2 x phono + 1 x headphone + 1 x aux/mic built-in would be lovely, in comparison. This kind of requirement is categorised as ‘project’ rather than ‘core’, so you have to break out with a HAT (bringing with it all the angst of switching cases etc.) or USB, which is clearly a more comfortable and convenient choice from the point of a user.

Reply to Anthony R. King

Paul Miilligan avatar

First of all, congratulations and thank you for filling in so much detail.
It took me a while to understand the ‘benefit’ of requiring 5v 5a rather than doing what most devices do and use the USB C PD to input 12v 2.1a and switch it down to 5v.
I’ve already got 2 Pi 5 boards on order but only 1 power supply as I have several ‘spare’ USB C chargers from mobile phones.
I think it will be important to stress the 5v 5a requirement so you don’t get people saying ‘it doesn’t work properly with my USB C supply’.

Reply to Paul Miilligan

Jamie Bevan avatar

Guys, very interesting details. And impressive as always! Amazing what you have done (and do).

Reply to Jamie Bevan

Richard Collins avatar

With the GPIO now on it’s own chip with the connection being PCIe I am interested in what doors this opens. If the RP1 were sold separately then we could get a RPi PCIe card for our PC’s. Also could allow for ‘official’ clones, they get their RP1 chips after submitting their design for checks.

Reply to Richard Collins

Tony Finch avatar

I have noticed that some pictures of the Raspberry Pi 5 show a pale yellow thing attached to the bottom of the board under the CSI/DSI connectors, e.g. https://regmedia.co.uk/2023/09/27/rpi5_csi_dsi.jpg

Looks like whatever it is is soldered to J15, and there is a similar footprint labelled J19 under the USB2 sockets. https://www.phoronix.com/image-viewer.php?id=raspberry-pi-5-benchmarks&image=raspberrypi_5_5_lrg

I wonder what they are for.

Reply to Tony Finch

James Adams avatar

JTAG debug for the 2712 and RP1 respectively. Those connectors are not fitted on production units.

Reply to James Adams

Tony Finch avatar

Aha, thank you!

Reply to Tony Finch

fanoush avatar

Many thanks for the transcript. I did watch it first but missed lot of detail. One surprising detail I missed is all the analogue talk about RP1 and 40nm node. What is analogue about RP1? Are there ADCs or DACs in RP1? And BTW is the gpio 5v tolerant?

Reply to fanoush

James Adams avatar

We’re talking about the high speed analogue here (Oscillator, PLLs, the USB, MIPI and PCIe PHY [PHYsical Layer]).

Reply to James Adams

fanoush avatar

Oh, thanks for explaining. Never thought there is anything analogue about USB, PCIE or MIPI as these are digital interfaces shifting bits but after some googling I understand a bit more now.

Reply to fanoush

Eric Brombaugh avatar

I’m curious about the details of what’s inside the RP1 southbridge chip. Will there be documentation on that available soon?

Reply to Eric Brombaugh

James Adams avatar

Yes documentation is in progress and will be released fairly soon.

Reply to James Adams

Loz avatar

Are compute module 4 PCIe accessories likely to fit and or work on the pi 5?
I’m hoping to turn mine into a Nas/media server when it arrives

Reply to Loz

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